The present invention relates to a silicon carbide-oxide layered structure including a silicon carbide layer, a production method thereof, and a semiconductor device produced by using the silicon carbide-oxide layered structure.
In recent years, applications of silicon carbide (SiC) to low-loss power devices have been expected because silicon carbide has a structure where Si and C are bonded at the composition ratio of 1:1 and has high breakdown tolerance as compared with other wide band gap semiconductor materials.
One of the most practicable applications of SiC to a power device is the application to a SiC device for power driving which has an insulated-gate transistor, i.e., a SiC-MISFET structure, wherein SiC is subjected to thermal oxidation to form a high-quality SiO2 film on a SiC layer.
In order to realize a low-loss power device having a SiC-MISFET structure, it is necessary to reduce defects in a gate insulating film and an interface between a SiC layer and the gate insulating film such that the channel mobility of 200 cm2/Vs or higher is achieved.
An inverted MISFET, which is formed using a 4H—SiC (1 1-2 0) substrate whose principal surface is a (1 1-2 0) face, achieves the channel mobility of 200 cm2/Vs or higher. However, the 4H—SiC (1 1-2 0) substrate is not suitable for mass production and is therefore difficult to be used as a substrate for commercial devices.
A large number of techniques for forming a gate insulating film on a SiC (0 0 0 1) face substrate, which is suitable for mass production, have been proposed until now (see, for example, L. A. Lipkin and J. W. Palmour, J. Electron. Mater. 25, 909 (1996) and G. Y. Chung, C. C. Tin, J. R. Williams, K. McDonald, R. K. Chanana, Robert A. Weller, S. T. Pantelides, Leonard C. Feldman, O. W. Holland, M. K. Das, and John W. Palmour, “Improved Inversion Channel Mobility for 4H—SiC MOSFETs Following High Temperature Anneals in Nitric Oxide” IEEE Electron Device Lett., vol. 22, pp. 176-178, 2001). According to one of the most standard processes, a thermal oxide film is formed at a high temperature of 1100° C. or higher in a dry or wet atmosphere and annealed in an argon atmosphere, and then, the thermal oxide film is subjected to the POA in an oxygen atmosphere containing highly-concentrated water vapor at 950° C. for 3 hours, whereby a gate insulating film is formed. Under the condition where a high temperature thermal treatment is not performed for gate electrode formation, an inverted MISFET formed on a 4H—SiC (0 0 0 1) substrate having a flat surface, in which asperities are 10 nm or smaller, has the channel mobility of about 50 cm2/Vs.
However, in a MISFET having a gate insulating film formed of a thermal oxide film according to the above-described standard process, a thermal treatment at 950° C. or higher in the gate electrode formation process deteriorates the actual channel mobility to 20 cm2/Vs or lower. A MISFET formed on a 4H—SiC (0 0 0 1) substrate having poor flatness, i.e., having steps over the surface, according to the above-described standard process, has the channel mobility of 10 cm2/Vs or lower. In this MISFET, the channel mobility over the surface of the SiC substrate has a large anisotropy. In this structure, a large electric current flows along the steps whereas an electric current which traverses the steps is smaller by an order of magnitude than the large electric current flowing along the steps. Thus, such problems greatly impede the application of the above techniques to commercial devices.